/*
 * gen-syscall, Tue May  3 00:38:44 2022
 *
 * DO NOT EDIT - this file is automatically generated!
 */

/*                                                                      
 * This file belongs to FreeMiNT. It's not in the original MiNT 1.12    
 * distribution. See the file CHANGES for a detailed log of changes.    
 *                                                                      
 *                                                                      
 * Copyright 2000-2005 Frank Naumann <fnaumann@freemint.de>             
 * All rights reserved.                                                 
 *                                                                      
 * Please send suggestions, patches or bug reports to me or             
 * the MiNT mailing list.                                               
 *                                                                      
 *                                                                      
 * This file is free software; you can redistribute it and/or modify    
 * it under the terms of the GNU General Public License as published by 
 * the Free Software Foundation; either version 2, or (at your option)  
 * any later version.                                                   
 *                                                                      
 * This file is distributed in the hope that it will be useful,         
 * but WITHOUT ANY WARRANTY; without even the implied warranty of       
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the        
 * GNU General Public License for more details.                         
 *                                                                      
 * You should have received a copy of the GNU General Public License    
 * along with this program; if not, write to the Free Software          
 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.            
 *                                                                      
 */                                                                     

#ifndef _MINT_TRAP14_H
#define _MINT_TRAP14_H

#ifndef _COMPILER_H
#include <compiler.h>
#endif

__BEGIN_DECLS

#define trap_14_wwlll(n,a,b,c,d) \
__extension__ \
({ \
	register long retvalue __asm__("d0"); \
	short _a = (short)(a); \
	long _b = (long)(b); \
	long _c = (long)(c); \
	long _d = (long)(d); \
	 \
	__asm__ volatile \
	( \
		"movl	%5,sp@-\n\t" \
		"movl	%4,sp@-\n\t" \
		"movl	%3,sp@-\n\t" \
		"movw	%2,sp@-\n\t" \
		"movw	%1,sp@-\n\t" \
		"trap	#14\n\t" \
		"lea	sp@(16),sp" \
	: "=r"(retvalue) /* outputs */ \
	: "g"(n), "r"(_a), "r"(_b), "r"(_c), "r"(_d) /* inputs  */ \
	: __CLOBBER_RETURN("d0") "d1", "d2", "a0", "a1", "a2" /* clobbered regs */ \
	  AND_MEMORY \
	); \
	retvalue; \
})

#define trap_14_wwwwww(n,a,b,c,d,e) \
__extension__ \
({ \
	register long retvalue __asm__("d0"); \
	short _a = (short)(a); \
	short _b = (short)(b); \
	short _c = (short)(c); \
	short _d = (short)(d); \
	short _e = (short)(e); \
	 \
	__asm__ volatile \
	( \
		"movw	%6,sp@-\n\t" \
		"movw	%5,sp@-\n\t" \
		"movw	%4,sp@-\n\t" \
		"movw	%3,sp@-\n\t" \
		"movw	%2,sp@-\n\t" \
		"movw	%1,sp@-\n\t" \
		"trap	#14\n\t" \
		"lea	sp@(12),sp" \
	: "=r"(retvalue) /* outputs */ \
	: "g"(n), "r"(_a), "r"(_b), "r"(_c), "r"(_d), "r"(_e) /* inputs  */ \
	: __CLOBBER_RETURN("d0") "d1", "d2", "a0", "a1", "a2" /* clobbered regs */ \
	  AND_MEMORY \
	); \
	retvalue; \
})

#define trap_14_wllw(n,a,b,c) \
__extension__ \
({ \
	register long retvalue __asm__("d0"); \
	long _a = (long)(a); \
	long _b = (long)(b); \
	short _c = (short)(c); \
	 \
	__asm__ volatile \
	( \
		"movw	%4,sp@-\n\t" \
		"movl	%3,sp@-\n\t" \
		"movl	%2,sp@-\n\t" \
		"movw	%1,sp@-\n\t" \
		"trap	#14\n\t" \
		"lea	sp@(12),sp" \
	: "=r"(retvalue) /* outputs */ \
	: "g"(n), "r"(_a), "r"(_b), "r"(_c) /* inputs  */ \
	: __CLOBBER_RETURN("d0") "d1", "d2", "a0", "a1", "a2" /* clobbered regs */ \
	  AND_MEMORY \
	); \
	retvalue; \
})

#define trap_14_wlwl(n,a,b,c) \
__extension__ \
({ \
	register long retvalue __asm__("d0"); \
	long _a = (long)(a); \
	short _b = (short)(b); \
	long _c = (long)(c); \
	 \
	__asm__ volatile \
	( \
		"movl	%4,sp@-\n\t" \
		"movw	%3,sp@-\n\t" \
		"movl	%2,sp@-\n\t" \
		"movw	%1,sp@-\n\t" \
		"trap	#14\n\t" \
		"lea	sp@(12),sp" \
	: "=r"(retvalue) /* outputs */ \
	: "g"(n), "r"(_a), "r"(_b), "r"(_c) /* inputs  */ \
	: __CLOBBER_RETURN("d0") "d1", "d2", "a0", "a1", "a2" /* clobbered regs */ \
	  AND_MEMORY \
	); \
	retvalue; \
})

#define trap_14_wll(n,a,b) \
__extension__ \
({ \
	register long retvalue __asm__("d0"); \
	long _a = (long)(a); \
	long _b = (long)(b); \
	 \
	__asm__ volatile \
	( \
		"movl	%3,sp@-\n\t" \
		"movl	%2,sp@-\n\t" \
		"movw	%1,sp@-\n\t" \
		"trap	#14\n\t" \
		"lea	sp@(10),sp" \
	: "=r"(retvalue) /* outputs */ \
	: "g"(n), "r"(_a), "r"(_b) /* inputs  */ \
	: __CLOBBER_RETURN("d0") "d1", "d2", "a0", "a1", "a2" /* clobbered regs */ \
	  AND_MEMORY \
	); \
	retvalue; \
})

#define trap_14_wllll(n,a,b,c,d) \
__extension__ \
({ \
	register long retvalue __asm__("d0"); \
	long _a = (long)(a); \
	long _b = (long)(b); \
	long _c = (long)(c); \
	long _d = (long)(d); \
	 \
	__asm__ volatile \
	( \
		"movl	%5,sp@-\n\t" \
		"movl	%4,sp@-\n\t" \
		"movl	%3,sp@-\n\t" \
		"movl	%2,sp@-\n\t" \
		"movw	%1,sp@-\n\t" \
		"trap	#14\n\t" \
		"lea	sp@(18),sp" \
	: "=r"(retvalue) /* outputs */ \
	: "g"(n), "r"(_a), "r"(_b), "r"(_c), "r"(_d) /* inputs  */ \
	: __CLOBBER_RETURN("d0") "d1", "d2", "a0", "a1", "a2" /* clobbered regs */ \
	  AND_MEMORY \
	); \
	retvalue; \
})

#define trap_14_wwwll(n,a,b,c,d) \
__extension__ \
({ \
	register long retvalue __asm__("d0"); \
	short _a = (short)(a); \
	short _b = (short)(b); \
	long _c = (long)(c); \
	long _d = (long)(d); \
	 \
	__asm__ volatile \
	( \
		"movl	%5,sp@-\n\t" \
		"movl	%4,sp@-\n\t" \
		"movw	%3,sp@-\n\t" \
		"movw	%2,sp@-\n\t" \
		"movw	%1,sp@-\n\t" \
		"trap	#14\n\t" \
		"lea	sp@(14),sp" \
	: "=r"(retvalue) /* outputs */ \
	: "g"(n), "r"(_a), "r"(_b), "r"(_c), "r"(_d) /* inputs  */ \
	: __CLOBBER_RETURN("d0") "d1", "d2", "a0", "a1", "a2" /* clobbered regs */ \
	  AND_MEMORY \
	); \
	retvalue; \
})

#define trap_14_wwlwl(n,a,b,c,d) \
__extension__ \
({ \
	register long retvalue __asm__("d0"); \
	short _a = (short)(a); \
	long _b = (long)(b); \
	short _c = (short)(c); \
	long _d = (long)(d); \
	 \
	__asm__ volatile \
	( \
		"movl	%5,sp@-\n\t" \
		"movw	%4,sp@-\n\t" \
		"movl	%3,sp@-\n\t" \
		"movw	%2,sp@-\n\t" \
		"movw	%1,sp@-\n\t" \
		"trap	#14\n\t" \
		"lea	sp@(14),sp" \
	: "=r"(retvalue) /* outputs */ \
	: "g"(n), "r"(_a), "r"(_b), "r"(_c), "r"(_d) /* inputs  */ \
	: __CLOBBER_RETURN("d0") "d1", "d2", "a0", "a1", "a2" /* clobbered regs */ \
	  AND_MEMORY \
	); \
	retvalue; \
})

#define trap_14_wwllw(n,a,b,c,d) \
__extension__ \
({ \
	register long retvalue __asm__("d0"); \
	short _a = (short)(a); \
	long _b = (long)(b); \
	long _c = (long)(c); \
	short _d = (short)(d); \
	 \
	__asm__ volatile \
	( \
		"movw	%5,sp@-\n\t" \
		"movl	%4,sp@-\n\t" \
		"movl	%3,sp@-\n\t" \
		"movw	%2,sp@-\n\t" \
		"movw	%1,sp@-\n\t" \
		"trap	#14\n\t" \
		"lea	sp@(14),sp" \
	: "=r"(retvalue) /* outputs */ \
	: "g"(n), "r"(_a), "r"(_b), "r"(_c), "r"(_d) /* inputs  */ \
	: __CLOBBER_RETURN("d0") "d1", "d2", "a0", "a1", "a2" /* clobbered regs */ \
	  AND_MEMORY \
	); \
	retvalue; \
})

#define trap_14_wlwlw(n,a,b,c,d) \
__extension__ \
({ \
	register long retvalue __asm__("d0"); \
	long _a = (long)(a); \
	short _b = (short)(b); \
	long _c = (long)(c); \
	short _d = (short)(d); \
	 \
	__asm__ volatile \
	( \
		"movw	%5,sp@-\n\t" \
		"movl	%4,sp@-\n\t" \
		"movw	%3,sp@-\n\t" \
		"movl	%2,sp@-\n\t" \
		"movw	%1,sp@-\n\t" \
		"trap	#14\n\t" \
		"lea	sp@(14),sp" \
	: "=r"(retvalue) /* outputs */ \
	: "g"(n), "r"(_a), "r"(_b), "r"(_c), "r"(_d) /* inputs  */ \
	: __CLOBBER_RETURN("d0") "d1", "d2", "a0", "a1", "a2" /* clobbered regs */ \
	  AND_MEMORY \
	); \
	retvalue; \
})

#define trap_14_wllllll(n,a,b,c,d,e,f) \
__extension__ \
({ \
	register long retvalue __asm__("d0"); \
	long _a = (long)(a); \
	long _b = (long)(b); \
	long _c = (long)(c); \
	long _d = (long)(d); \
	long _e = (long)(e); \
	long _f = (long)(f); \
	 \
	__asm__ volatile \
	( \
		"movl	%7,sp@-\n\t" \
		"movl	%6,sp@-\n\t" \
		"movl	%5,sp@-\n\t" \
		"movl	%4,sp@-\n\t" \
		"movl	%3,sp@-\n\t" \
		"movl	%2,sp@-\n\t" \
		"movw	%1,sp@-\n\t" \
		"trap	#14\n\t" \
		"lea	sp@(26),sp" \
	: "=r"(retvalue) /* outputs */ \
	: "g"(n), "r"(_a), "r"(_b), "r"(_c), "r"(_d), "r"(_e), "r"(_f) /* inputs  */ \
	: __CLOBBER_RETURN("d0") "d1", "d2", "a0", "a1", "a2" /* clobbered regs */ \
	  AND_MEMORY \
	); \
	retvalue; \
})

#define trap_14_wwwwl(n,a,b,c,d) \
__extension__ \
({ \
	register long retvalue __asm__("d0"); \
	short _a = (short)(a); \
	short _b = (short)(b); \
	short _c = (short)(c); \
	long _d = (long)(d); \
	 \
	__asm__ volatile \
	( \
		"movl	%5,sp@-\n\t" \
		"movw	%4,sp@-\n\t" \
		"movw	%3,sp@-\n\t" \
		"movw	%2,sp@-\n\t" \
		"movw	%1,sp@-\n\t" \
		"trap	#14\n\t" \
		"lea	sp@(12),sp" \
	: "=r"(retvalue) /* outputs */ \
	: "g"(n), "r"(_a), "r"(_b), "r"(_c), "r"(_d) /* inputs  */ \
	: __CLOBBER_RETURN("d0") "d1", "d2", "a0", "a1", "a2" /* clobbered regs */ \
	  AND_MEMORY \
	); \
	retvalue; \
})

#define trap_14_wlll(n,a,b,c) \
__extension__ \
({ \
	register long retvalue __asm__("d0"); \
	long _a = (long)(a); \
	long _b = (long)(b); \
	long _c = (long)(c); \
	 \
	__asm__ volatile \
	( \
		"movl	%4,sp@-\n\t" \
		"movl	%3,sp@-\n\t" \
		"movl	%2,sp@-\n\t" \
		"movw	%1,sp@-\n\t" \
		"trap	#14\n\t" \
		"lea	sp@(14),sp" \
	: "=r"(retvalue) /* outputs */ \
	: "g"(n), "r"(_a), "r"(_b), "r"(_c) /* inputs  */ \
	: __CLOBBER_RETURN("d0") "d1", "d2", "a0", "a1", "a2" /* clobbered regs */ \
	  AND_MEMORY \
	); \
	retvalue; \
})

#define trap_14_wwwwwww(n,a,b,c,d,e,f) \
__extension__ \
({ \
	register long retvalue __asm__("d0"); \
	short _a = (short)(a); \
	short _b = (short)(b); \
	short _c = (short)(c); \
	short _d = (short)(d); \
	short _e = (short)(e); \
	short _f = (short)(f); \
	 \
	__asm__ volatile \
	( \
		"movw	%7,sp@-\n\t" \
		"movw	%6,sp@-\n\t" \
		"movw	%5,sp@-\n\t" \
		"movw	%4,sp@-\n\t" \
		"movw	%3,sp@-\n\t" \
		"movw	%2,sp@-\n\t" \
		"movw	%1,sp@-\n\t" \
		"trap	#14\n\t" \
		"lea	sp@(14),sp" \
	: "=r"(retvalue) /* outputs */ \
	: "g"(n), "r"(_a), "r"(_b), "r"(_c), "r"(_d), "r"(_e), "r"(_f) /* inputs  */ \
	: __CLOBBER_RETURN("d0") "d1", "d2", "a0", "a1", "a2" /* clobbered regs */ \
	  AND_MEMORY \
	); \
	retvalue; \
})

#define trap_14_wwl(n,a,b) \
__extension__ \
({ \
	register long retvalue __asm__("d0"); \
	short _a = (short)(a); \
	long _b = (long)(b); \
	 \
	__asm__ volatile \
	( \
		"movl	%3,sp@-\n\t" \
		"movw	%2,sp@-\n\t" \
		"movw	%1,sp@-\n\t" \
		"trap	#14\n\t" \
		"addql	#8,sp" \
	: "=r"(retvalue) /* outputs */ \
	: "g"(n), "r"(_a), "r"(_b) /* inputs  */ \
	: __CLOBBER_RETURN("d0") "d1", "d2", "a0", "a1", "a2" /* clobbered regs */ \
	  AND_MEMORY \
	); \
	retvalue; \
})

#define trap_14_wwwl(n,a,b,c) \
__extension__ \
({ \
	register long retvalue __asm__("d0"); \
	short _a = (short)(a); \
	short _b = (short)(b); \
	long _c = (long)(c); \
	 \
	__asm__ volatile \
	( \
		"movl	%4,sp@-\n\t" \
		"movw	%3,sp@-\n\t" \
		"movw	%2,sp@-\n\t" \
		"movw	%1,sp@-\n\t" \
		"trap	#14\n\t" \
		"lea	sp@(10),sp" \
	: "=r"(retvalue) /* outputs */ \
	: "g"(n), "r"(_a), "r"(_b), "r"(_c) /* inputs  */ \
	: __CLOBBER_RETURN("d0") "d1", "d2", "a0", "a1", "a2" /* clobbered regs */ \
	  AND_MEMORY \
	); \
	retvalue; \
})

#define trap_14_wllwwwwwlw(n,a,b,c,d,e,f,g,h,i) \
__extension__ \
({ \
	register long retvalue __asm__("d0"); \
	long _a = (long)(a); \
	long _b = (long)(b); \
	short _c = (short)(c); \
	short _d = (short)(d); \
	short _e = (short)(e); \
	short _f = (short)(f); \
	short _g = (short)(g); \
	long _h = (long)(h); \
	short _i = (short)(i); \
	 \
	__asm__ volatile \
	( \
		"movw	%9,sp@-\n\t" \
		"movl	%8,sp@-\n\t" \
		"movw	%7,sp@-\n\t" \
		"movw	%6,sp@-\n\t" \
		"movw	%5,sp@-\n\t" \
		"movw	%4,sp@-\n\t" \
		"movw	%3,sp@-\n\t" \
		"movl	%2,sp@-\n\t" \
		"movl	%1,sp@-\n\t" \
		"movw	%0,sp@-" \
	: /* outputs */ \
	: "g"(n), "r"(_a), "r"(_b), "r"(_c), "r"(_d), "r"(_e), "r"(_f), "r"(_g), "r"(_h), "r"(_i) /* inputs  */ \
	); \
	 \
	__asm__ volatile \
	( \
		"trap	#14\n\t" \
		"lea	sp@(26),sp" \
	: "=r"(retvalue) /* outputs */ \
	: /* inputs */ \
	: __CLOBBER_RETURN("d0") "d1", "d2", "a0", "a1", "a2" /* clobbered regs */ \
	  AND_MEMORY \
	); \
	retvalue; \
})

#define trap_14_wllwwwww(n,a,b,c,d,e,f,g) \
__extension__ \
({ \
	register long retvalue __asm__("d0"); \
	long _a = (long)(a); \
	long _b = (long)(b); \
	short _c = (short)(c); \
	short _d = (short)(d); \
	short _e = (short)(e); \
	short _f = (short)(f); \
	short _g = (short)(g); \
	 \
	__asm__ volatile \
	( \
		"movw	%8,sp@-\n\t" \
		"movw	%7,sp@-\n\t" \
		"movw	%6,sp@-\n\t" \
		"movw	%5,sp@-\n\t" \
		"movw	%4,sp@-\n\t" \
		"movl	%3,sp@-\n\t" \
		"movl	%2,sp@-\n\t" \
		"movw	%1,sp@-\n\t" \
		"trap	#14\n\t" \
		"lea	sp@(20),sp" \
	: "=r"(retvalue) /* outputs */ \
	: "g"(n), "r"(_a), "r"(_b), "r"(_c), "r"(_d), "r"(_e), "r"(_f), "r"(_g) /* inputs  */ \
	: __CLOBBER_RETURN("d0") "d1", "d2", "a0", "a1", "a2" /* clobbered regs */ \
	  AND_MEMORY \
	); \
	retvalue; \
})

#define trap_14_www(n,a,b) \
__extension__ \
({ \
	register long retvalue __asm__("d0"); \
	short _a = (short)(a); \
	short _b = (short)(b); \
	 \
	__asm__ volatile \
	( \
		"movw	%3,sp@-\n\t" \
		"movw	%2,sp@-\n\t" \
		"movw	%1,sp@-\n\t" \
		"trap	#14\n\t" \
		"addql	#6,sp" \
	: "=r"(retvalue) /* outputs */ \
	: "g"(n), "r"(_a), "r"(_b) /* inputs  */ \
	: __CLOBBER_RETURN("d0") "d1", "d2", "a0", "a1", "a2" /* clobbered regs */ \
	  AND_MEMORY \
	); \
	retvalue; \
})

#define trap_14_wl(n,a) \
__extension__ \
({ \
	register long retvalue __asm__("d0"); \
	long _a = (long)(a); \
	 \
	__asm__ volatile \
	( \
		"movl	%2,sp@-\n\t" \
		"movw	%1,sp@-\n\t" \
		"trap	#14\n\t" \
		"addql	#6,sp" \
	: "=r"(retvalue) /* outputs */ \
	: "g"(n), "r"(_a) /* inputs  */ \
	: __CLOBBER_RETURN("d0") "d1", "d2", "a0", "a1", "a2" /* clobbered regs */ \
	  AND_MEMORY \
	); \
	retvalue; \
})

#define trap_14_wllww(n,a,b,c,d) \
__extension__ \
({ \
	register long retvalue __asm__("d0"); \
	long _a = (long)(a); \
	long _b = (long)(b); \
	short _c = (short)(c); \
	short _d = (short)(d); \
	 \
	__asm__ volatile \
	( \
		"movw	%5,sp@-\n\t" \
		"movw	%4,sp@-\n\t" \
		"movl	%3,sp@-\n\t" \
		"movl	%2,sp@-\n\t" \
		"movw	%1,sp@-\n\t" \
		"trap	#14\n\t" \
		"lea	sp@(14),sp" \
	: "=r"(retvalue) /* outputs */ \
	: "g"(n), "r"(_a), "r"(_b), "r"(_c), "r"(_d) /* inputs  */ \
	: __CLOBBER_RETURN("d0") "d1", "d2", "a0", "a1", "a2" /* clobbered regs */ \
	  AND_MEMORY \
	); \
	retvalue; \
})

#define trap_14_w(n) \
__extension__ \
({ \
	register long retvalue __asm__("d0"); \
	 \
	__asm__ volatile \
	( \
		"movw	%1,sp@-\n\t" \
		"trap	#14\n\t" \
		"addql	#2,sp" \
	: "=r"(retvalue) /* outputs */ \
	: "g"(n) /* inputs  */ \
	: __CLOBBER_RETURN("d0") "d1", "d2", "a0", "a1", "a2" /* clobbered regs */ \
	  AND_MEMORY \
	); \
	retvalue; \
})

#define trap_14_ww(n,a) \
__extension__ \
({ \
	register long retvalue __asm__("d0"); \
	short _a = (short)(a); \
	 \
	__asm__ volatile \
	( \
		"movw	%2,sp@-\n\t" \
		"movw	%1,sp@-\n\t" \
		"trap	#14\n\t" \
		"addql	#4,sp" \
	: "=r"(retvalue) /* outputs */ \
	: "g"(n), "r"(_a) /* inputs  */ \
	: __CLOBBER_RETURN("d0") "d1", "d2", "a0", "a1", "a2" /* clobbered regs */ \
	  AND_MEMORY \
	); \
	retvalue; \
})

#define trap_14_wwll(n,a,b,c) \
__extension__ \
({ \
	register long retvalue __asm__("d0"); \
	short _a = (short)(a); \
	long _b = (long)(b); \
	long _c = (long)(c); \
	 \
	__asm__ volatile \
	( \
		"movl	%4,sp@-\n\t" \
		"movl	%3,sp@-\n\t" \
		"movw	%2,sp@-\n\t" \
		"movw	%1,sp@-\n\t" \
		"trap	#14\n\t" \
		"lea	sp@(12),sp" \
	: "=r"(retvalue) /* outputs */ \
	: "g"(n), "r"(_a), "r"(_b), "r"(_c) /* inputs  */ \
	: __CLOBBER_RETURN("d0") "d1", "d2", "a0", "a1", "a2" /* clobbered regs */ \
	  AND_MEMORY \
	); \
	retvalue; \
})

__END_DECLS

#endif /* _MINT_TRAP14_H */
